The general structure of an LCD consists of a liquid crystal (LC) layer that is positioned between an upper panel provided with a common electrode and a lower panel provided with pixel electrodes. The molecular orientations of the LC layer is changed by an electric field that is generated by different voltages applied to the common electrode and the pixel electrodes such that the transmittance of light is adjusted to display desired images.
The lower panel includes gate lines (i.e., scanning lines), data lines (i.e., picture signal lines), thin film transistors (TFTs) provided at respective pixels and connected to the gate lines and the data lines, and pixel electrodes connected to the TFTs.
A passivation layer provided at the lower panel is made of organic material having low dielectric constant in order to increase aperture ratio of the LCD. For example, the aperture ratio is increased by forming an organic passivation layer between the pixel electrodes and the gate lines and the data lines and overlapping the pixel electrodes with the gate lines and the data lines.
However, the dose distance between the pixel electrodes and the data lines may make parasitic coupling that deteriorate image quality. In order to solve this problem, the coupling may be minimized by thickening the passivation layer.
However, the thick passivation layer requires wide contact holes and smooth sidewalls for obtaining reliability of contacts, which may decrease the aperture ratio.
In the meantime, a storage capacitor for providing storage capacitance of a pixel is formed in a previous gate type or in an independent wire type. The previous gate type forms the storage capacitor by expanding a portion of a gate line and by providing a conductor pattern connected to a pixel electrode and overlapping the expansion of the gate line. The independent wire type forms the storage capacitor by adding a signal wire extending parallel to the gate line and overlapping the signal wire with the pixel electrode.
However, the aperture ratio is decreased by the expansion of the gate line or by the additional signal line provided for obtaining sufficient storage capacitance.